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Improving thermal-safe test scheduling for core-based systems-on-chip using shift frequency scaling

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4 Author(s)
Tafaj, E. ; Sch. of Electron. & Comput. Sci., Southampton Univ., UK ; Rosinger, P. ; Al-Hashimi, B.M. ; Chakrabarty, K.

Recently, we have shown how hot-spots during test can be avoided without unnecessarily increasing the testing time by using a thermal-safe test scheduling approach (Rosinger and Al-Hashimi, 2005). In this work, we investigate the impact of scan shift frequency scaling on the thermal-safe test scheduling performance and propose an algorithm which embeds shift frequency scaling into the test scheduling process. Experimental results show that this approach offers shorter overall testing times and significantly improved ability of meeting tight thermal constraints when compared to existing thermal-safe test scheduling approach based on a fixed scan shift frequency.

Published in:

Defect and Fault Tolerance in VLSI Systems, 2005. DFT 2005. 20th IEEE International Symposium on

Date of Conference:

3-5 Oct. 2005