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Bridging the processor-memory performance gap with 3D IC technology

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4 Author(s)
C. C. Liu ; Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA ; I. Ganusov ; M. Burtscher ; Sandip Tiwari

Microprocessor performance has been improving at roughly 60% per year. Memory access times, however, have improved by less than 10% per year. The resulting gap between logic and memory performance has forced microprocessor designs toward complex and power-hungry architectures that support out-of-order and speculative execution. Moreover, processors have been designed with increasingly large cache hierarchies to hide main memory latency. This article examines how 3D IC technology can improve interactions between the processor and memory. Our work examines the performance of a single-core, single-threaded processor under representative work loads. We have shown that reducing memory latency by bringing main memory on chip gives us near-perfect performance. Three-dimensional IC technology can provide the much needed bandwidth without the cost, design complexity, and power issues associated with a large number of off-chip pins. The principal challenge remains the demonstration of a highly manufacturable 3D IC technology with high yield and low cost.

Published in:

IEEE Design & Test of Computers  (Volume:22 ,  Issue: 6 )