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A fixed-point multimedia coprocessor with 50Mvertices/s programmable SIMD vertex shader for mobile applications

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4 Author(s)
Ju-Ho Sohn ; Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea ; Jeong-Ho Woo ; Ramchan Woo ; Hoi-Jun Yoo

A fixed-point multimedia coprocessor is designed and integrated into an ARM-10 based mobile graphics processor for portable 2D and 3D multimedia applications. The user-programmable SIMD vertex shader with ARM-10 co-processor architecture realizes advanced 3D graphics algorithms and various multimedia functions. Different from conventional ARM coprocessor architecture, the multimedia coprocessor implements dual operations, by which parallel and streaming multimedia processing is enabled in mobile applications. For low power consumption, fixed-point SIMD datapath is designed with instruction-wise clock gating. The co-processor takes 10.2mm2 in 0.18μm 6-metal standard CMOS logic process and achieves 50Mvertices/s graphics performance with 75.4mW power consumption.

Published in:

Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.

Date of Conference:

12-16 Sept. 2005