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Automated instruction-set extension of embedded processors with application to MPEG-4 video encoding

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2 Author(s)
N. Kavvadias ; Dept. of Phys., Aristotle Univ. of Thessaloniki, Greece ; S. Nikolaidis

A recent approach to platform-based design involves the use of extensible processors, offering architecture customization possibilities. Part of the designer responsibilities is the domain-specific extension of the baseline processor to fit customer requirements. Key issues of this process are the automated application analysis and candidate instruction identification/selection for implementation as application-specific functional units (AFUs). In this paper, a design approach that encapsulates automated workload characterization and instruction generation is utilized for extending processors to efficiently support embedded application sets. The method used for instruction generation is a highly parameterized adaptation of the MaxMISO technique, which allows for fast design space exploration. It is proven that only a small number of AFUs are needed in order to support the algorithms of interest (MPEG-4 encoding kernels) and that it is possible to achieve 2× to 3.5× performance improvements although further possibilities such as subword parallelization are not currently regarded.

Published in:

2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05)

Date of Conference:

23-25 July 2005