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Towards a framework for system-level design of multiprocessor SoC platforms for media processing

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1 Author(s)
Chakraborty, S. ; Dept. of Comput. Sci., Singapore Nat. Univ., Singapore

Recently, a number of event-centric models have been proposed for analyzing multimedia applications running on multiprocessor system-on-chip (SoC) platforms. This has given shape to a general framework using which different timing and performance analysis questions can be answered in a single coherent manner. Central to this framework is a model for expressing the timing properties associated with different multimedia streams and a means for computing how these properties change as a stream gets successively processed by the different processors of a platform. In contrast to standard event models like periodic or sporadic, this model can accurately capture the data-dependent execution time variabilities associated multimedia tasks and the burstiness of on-chip traffic resulting from multimedia processing. In this paper, we give a high-level view of this framework, describe setups which currently can be modelled using it, and identify possible directions in which this framework should be extended to make it more usable.

Published in:

Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on

Date of Conference:

23-25 July 2005

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