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The effects of device metal interconnect overlayers on SEE testing

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3 Author(s)
Wert, J. ; Boeing Co., Seattle, WA, USA ; Normand, E. ; Hafer, C.

Technology advances in wafer processing and design, new device requirements and improved modeling necessitate the need for a careful determination of LET at and through the critical silicon region of interest during SEE testing.

Published in:

Radiation Effects Data Workshop, 2005. IEEE

Date of Conference:

11-15 July 2005

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