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A novel supply voltage switching control mechanism, called D-logic, for reducing power dissipation of array structures is presented. With this D-logic mechanism, the supply voltage levels are successively activated by external clock signal in the direction of signal propagation, which eliminates power dissipated by the glitches. The mechanism is easily incorporated with minimal circuit change in the existing array structure, and the speed of the array structure can be maintained. We have reduced the energy consumption of the multipliers and CORDICs as much as 50% with the proposed D-logic circuitry.