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Switching activity reduction in embedded systems: a genetic bus encoding approach

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4 Author(s)
Ascia, G. ; Dipt. di Ingegneria Informatica e delle Telecomunicazioni, Univ. di Catania, Italy ; Catania, V. ; Palesi, M. ; Parlato, A.

A new approach based on genetic algorithms to reduce power consumption by communication buses in an embedded system is presented. This approach makes it possible to obtain the truth table of an encoder that minimises switching activity on a bus. This method is static, in the sense that the encoders are generated ad hoc for specific traffic. This is not, however, a limiting hypothesis if the application scenario considered is that of embedded systems. An embedded system, in fact, executes the same application throughout its lifetime and so it is possible to have detailed knowledge of the trace of the patterns transmitted on a bus following execution of a specific application. The approach is compared with the most effective ones already presented in literature, on both multiplexed and separate buses. The results obtained demonstrate the validity of the approach, which on average saves up to 50% of the transitions normally required, in addition to their practical applicability, even in an on-chip environment.

Published in:

Computers and Digital Techniques, IEE Proceedings -  (Volume:152 ,  Issue: 6 )

Date of Publication:

4 Nov. 2005

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