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Energy reduction in multiprocessor systems using transactional memory

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3 Author(s)
Moreshet, T. ; Div. of Eng., Brown Univ., Providence, RI, USA ; Bahar, R.I. ; Herlihy, M.

The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniprocessors. In this work the authors focused on new energy consumption issues unique to multiprocessor systems: synchronization of accesses to shared memory. The authors investigated and compared different means of providing atomic access to shared memory, including locks and lock-free synchronization (i.e., transactional memory), with respect to energy as well as performance. It is shown that transactional memory has an advantage in terms of energy consumption over locks, but that this advantage largely depends on the system architecture, the contention level, and the policy of conflict resolution.

Published in:

Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on

Date of Conference:

8-10 Aug. 2005

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