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Fast configurable-cache tuning with a unified second-level cache

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3 Author(s)
Gordon-Ross, A. ; Dept. of Comput. Sci. & Eng., California Univ., Riverside, CA, USA ; Vahid, F. ; Dutt, N.

Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or a second level with separate instruction and data configurable caches. The authors instead used a commercially-common unified second level, a seemingly minor difference that actually expands the configuration space from 500 to about 20,000. Additive way tuning for tuning a cache subsystem was developed with this large space, yielding 62% energy savings and 35% performance improvements over a non-configurable cache, greatly outperforming an extension of a previous method.

Published in:

Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on

Date of Conference:

8-10 Aug. 2005