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Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits

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4 Author(s)
Mukhopadhyay, S. ; Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA ; Keunwoo Kim ; Ching-Te Chuang ; Roy, K.

In this paper we model (numerically and analytically) and analyze sub-threshold, gate-to-channel tunneling, and edge direct tunneling leakage in double gate (DG) devices. We compare the leakage of different DG structures, namely, doped body symmetric device with polysilicon gates, intrinsic body symmetric device with metal gates and intrinsic body asymmetric device with different front and back gate material. It is observed that, use of (near-mid-gap) metal gate and intrinsic body devices significantly reduces both the total leakage and its sensitivity to parametric variations in DG circuits.

Published in:

Low Power Electronics and Design, 2005. ISLPED '05. Proceedings of the 2005 International Symposium on

Date of Conference:

8-10 Aug. 2005