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An integrator employing the log-domain principle and fabricated in a 0.8-μm CMOS process is presented. It uses floating-gate MOS transistors biased in weak inversion to achieve low-voltage operation and low power consumption. The circuit does not suffer from initial charge trapped in the floating gates, thus not requiring postfabrication charge removal. It can be frequency tuned over more than three decades, from 25 Hz to 35 kHz, and uses a 1.2-V single supply to achieve a dynamic range at 1% THD of 75 dB thanks to its balanced class-AB operation. For cutoff frequencies in the range of 100 Hz, the supply voltage can be reduced down to 1 V. The circuit occupies an active area of 0.1 mm2 and dissipates 4.7 μW. The technique employed can be readily extended to high-order filters.