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Decoupled dynamic ternary content addressable memories

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3 Author(s)
J. G. Delgado-Frias ; Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA ; J. Nyathi ; S. B. Tatapudi

The content addressable memory (CAM) is a memory in which data can be accessed on the basis of contents rather than by specifying physical address. In the paper, five novel dynamic ternary CAM cells with decoupled match lines are presented. A ternary CAM cell is capable of storing and matching three values: zero (0), one (1), and don't care (X). The proposed dynamic CAM (DCAM) cells range in the number of transistors from 6 n-type transistors up to 10.5 n- and p-type transistors (one transistor is shared between two cells). The cells are capable of fast match and read operations enhancing the performance of the memory system. Using a 0.25-μm CMOS technology, simulations of the proposed CAM cells were performed to compare their performance. With this technology, the shortest match delay is 89.7 ps for the 7.5 DCAM cell. A complete characterization of the five cells is provided in this paper. These results show that the novel CAM cells outperform existing cells. The compact size and low power dissipation of these ternary CAM cells make them suitable for many applications such as routers, database, and associative cache memories.

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IEEE Transactions on Circuits and Systems I: Regular Papers  (Volume:52 ,  Issue: 10 )