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This paper introduces a description methodology to be used in heterogeneous, multi-HDL (hardware description language) system designs. Complex microelectronic embedded systems contain more and more concurrently designed subsystems, which are mostly coded in different HDLs to get best model performances. Verification of all subsystems in one environment represents a difficult task. This paper focuses on a HDL-independent description methodology, which enables a description of models coded in different HDLs using the same language semantic. Moreover, it supports a verification methodology for heterogeneous systems based on a cosimulation using standard EDA tools. The proposed description methodology has been applied on an application framework for heterogeneous system verification and later on evaluated by an example taken from the automotive industry.
Date of Conference: 22-23 Sept. 2005