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High-speed and memory efficient TCP stream scanning using FPGA

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3 Author(s)
Sugawara, Y. ; Dept. of Comput. Sci., Tokyo Univ., Japan ; Inaba, M. ; Hiraki, K.

In this paper, we propose methods to enable high-speed and memory efficient TCP stream level string matching using FPGA. Packet loss and inconsistent retransmissions are handled without dropping packets. Received packets are processed in their arriving order to reduce the buffering memory size. Consistency of retransmission packets is checked using hash value comparison. We evaluate the proposed system using Xilinx XC2VP100-5 FPGA. A 40Gbps network is supported by the proposed system with 140MB memory usage under a realistic traffic pattern. In addition, the proposed system realizes 39.3Gbps packet-processing throughput for a 1017 characters rule, and 1.85Gbps throughput for a 16375 characters rule.

Published in:

Field Programmable Logic and Applications, 2005. International Conference on

Date of Conference:

24-26 Aug. 2005