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High speed routing in a parallel processing environment: a simulation study

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2 Author(s)
Dowd, P.W. ; Dept. of Electr. & Comput. Eng., State Univ. of New York, Buffalo, NY, USA ; Carrato, M.

This paper examines techniques to achieve high speed routing in a distributed memory parallel computer environment. This paper develops a model to analyze the intra-node routing latency, and demonstrates that it may be the dominant factor of the overall system performance. This paper introduces three approaches, with varying levels of relative complexity, to improve intra-node routing capability. A simulation study has been developed to compare the behavior of each technique with three different topologies. The approach presented in this paper applies the advantages of dynamic interconnection networks to the problem of static interconnection network routing

Published in:

Simulation Symposium, 1991., Proceedings of the 24th Annual

Date of Conference:

1-5 Apr 1991