Referenced Items are not available for this document.
A 40 Gbit/s 1V limiting output buffer for an AC-coupled 50 Ω load with a differential output swing of 660 mV and a gain of 18 dB is presented. A power consumption of only 24 mW and a simulated risetime of 11 ps are achieved by means of a systematic buffer optimisation.
Published in:
Electronics Letters
(Volume:41
,
Issue:
19
)
Date of Publication: 15 September 2005
- Page(s):
- 1051 - 1053
- ISSN :
- 0013-5194
- INSPEC Accession Number:
- 8583171
- Digital Object Identifier :
- 10.1049/el:20052172
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 10 October 2005
- Issue Date :
- 15 September 2005
- Sponsored by :
- Institution of Engineering and Technology
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