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Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree

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4 Author(s)
H. Saaied ; Concordia Univ., Montreal, Que., Canada ; D. Al-Khalili ; A. J. Al-Khalili ; M. Nekili

The need for incremental algorithms to implement engineering changes (ECs) in clock trees (CTs) is critical in the system-on-a-chip (SoC) design cycle. An algorithm, called adaptive wire adjustment (AWA), is proposed to minimize the clock skew iteratively to any given bound. In order to speed up AWA's convergence, a local topology-modification (LTM) technique is incorporated into AWA. Moreover, LTM incorporation into AWA results in total wire-length reduction as well. Also, the incorporation of the LTM technique into the deferred-merge embedding (DME) algorithm and Greedy-DME (GDME) helps reduce the total wire length by around 7.8% and 9.8%, respectively. Additionally, applying LTM to GDME reduces wire elongations and the standard deviation of the path lengths (SDPL) between clock pins by 96.4% and 51.5%, respectively.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:24 ,  Issue: 10 )