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An update on IEEE P1647: the e system verification language

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1 Author(s)
Berman, V. ; Dept. of Victor Berman, Cadence Design Syst., North Andover, CA, Canada

The e language forms the basis of an extensive set of tools and methodologies, collectively known as verification process automation, and almost all major electronics companies worldwide use it. This paper discusses IEEE design automation standards project and shows that how the value of technology can be enhanced by the standardization process.

Published in:

Design & Test of Computers, IEEE  (Volume:22 ,  Issue: 5 )