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This article presents two approaches to solving the problem of communication between components dynamically placed at runtime on a reconfigurable device. The first is a circuit-routing approach designed for existing FPGAs. This approach uses the reconfigurable multiple bus (RMB). The second, network-based approach targets devices with unlimited reconfiguration capability such as coarse-grained reconfigurable devices. We introduce the dynamic network on chip (DyNoC) as a viable communication infrastructure for communication on dynamically reconfigurable devices. For prototyping the DyNoC on FPGAs, we design and implement an unrestricted communication model for a columnwise-reconfigurable chip. For the DyNoC, as well as for the RMB on chip (RMBoC), we provide algorithms and implementation results from real-life problems.