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Summary form only given. The rules are changing for highly integrated analog circuit design in modern sub-micron technologies. In modern technologies, the analog circuits are usually realized using thick-oxide options with older generation transistors. This makes it difficult to increase the speeds or lower the power or area for the analog circuits. In addition, the mask and processing costs are sky-rocketing, which makes iterating a couple of times to get analog circuits working not an option. What is one to do? High-precision analog and mixed-mode design using CMOS technologies, with minimum dimensions of 0.13μm, 0.09μm, and smaller, is increasingly difficult primarily due to technology (that is transistor and component) imperfections and to reduced voltage head-room limitations. First, typical sub-micron CMOS technologies, and their limitations, as they relate to analog and mixed mode design are described. Next circuit and design methodologies and practices suitable for sub-micron technologies which attempt to circumvent many of the limitations are presented. Finally, reliability issues are discussed, and a number of issues and considerations specific to analog design using sub-micron technologies are discussed.