By Topic

Fully differential CMOS current memory cell for analog-to-digital converters

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
O. Bernal ; Lab. d'Electronique de I'E.N.S.E.E.I.H.T, Toulouse, France ; M. Cousineau ; D. Standarovski ; M. Lescure

This paper presents a current memory cell (CMC) which can be used as basic elements of current pipeline analog-to-digital converter stages. This CMC is based on a fully differential structure which uses the Miller effect to reduce charge-injection errors. Using a 0.35μm 3.3V CMOS process, results show that the signal-dependent charge-injection error is less than 20nA for [-200μA;200μA] dynamic input current range. The acquisition time for a 200μ input step transition to achieve a 14 bit settling accuracy is 22ns. The active chip area and the power consumption of the proposed CMC are about 0.042mm2 and 6mW, respectively.

Published in:

International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005.  (Volume:1 )

Date of Conference:

14-15 July 2005