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Fully differential CMOS current memory cell for analog-to-digital converters

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4 Author(s)
Bernal, O. ; Lab. d''Electronique de I''E.N.S.E.E.I.H.T, Toulouse, France ; Cousineau, M. ; Standarovski, D. ; Lescure, M.

This paper presents a current memory cell (CMC) which can be used as basic elements of current pipeline analog-to-digital converter stages. This CMC is based on a fully differential structure which uses the Miller effect to reduce charge-injection errors. Using a 0.35μm 3.3V CMOS process, results show that the signal-dependent charge-injection error is less than 20nA for [-200μA;200μA] dynamic input current range. The acquisition time for a 200μ input step transition to achieve a 14 bit settling accuracy is 22ns. The active chip area and the power consumption of the proposed CMC are about 0.042mm2 and 6mW, respectively.

Published in:

Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on  (Volume:1 )

Date of Conference:

14-15 July 2005