Skip to Main Content
This paper presents a current memory cell (CMC) which can be used as basic elements of current pipeline analog-to-digital converter stages. This CMC is based on a fully differential structure which uses the Miller effect to reduce charge-injection errors. Using a 0.35μm 3.3V CMOS process, results show that the signal-dependent charge-injection error is less than 20nA for [-200μA;200μA] dynamic input current range. The acquisition time for a 200μ input step transition to achieve a 14 bit settling accuracy is 22ns. The active chip area and the power consumption of the proposed CMC are about 0.042mm2 and 6mW, respectively.
Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on (Volume:1 )
Date of Conference: 14-15 July 2005