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The methodology to calculate the parasitic capacitances in differential symmetric inductors will be presented in this paper. Inspired by the proposed methodology, a method called selective metal parallel shunting (SMPS) can move fQmax onto the desired frequency without additional processing steps. Based on the proposed methodology, a customized program is developed to predict Qmaxs and fQmaxs of on-chip inductors. Differential symmetric inductors and spiral ones with planar, all metal parallel shunting (AMPS), and SMPS configurations have been implemented in a 1P4M 0.35-μm CMOS process to verify the proposed method. Moreover, three 2.3-2.4 GHz voltage-controlled oscillators (VCOs) using planar, AMPS, and SMPS inductors, have also been realized. The phase noise of the VCO using SMPS inductors can be improved by 9.3 and 6 dB at 100-kHz offset frequency, respectively, compared to the VCOs using planar and AMPS inductors. The proposed SMPS technique can not only be applicable to VCO but also other RF circuits.