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A bit-serial, floating point CORDIC processor in VLSI

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The design of a block floating-point hardware CORDIC unit intended for use in large single-chip systems of CORDIC processors is described. More than 100 of these processors should be able to fit onto a single chip in today's CMOS technology. This processor is fully programmable in function. That is, by modifying a few programming bits, one may evaluate any of the operations native to the CORDIC algorithm plus others such as square root, exponential, and logarithm. Connections between these CORDIC units in a single-chip system would also be programmable. From this basic operations set, small networks of CORDIC processors may be constructed to implement a wide range of mathematical functions including roots and powers, as well as the inverse trigonometrics and hyperbolics

Published in:

Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on

Date of Conference:

14-17 Apr 1991

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