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Impact of scan-planes on memory-bandwidth of the sliding-window switch

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2 Author(s)
S. Kumar ; Dept. of Electr. Eng., Texas Univ., TX, USA ; T. Doganer

In this paper, we investigate the impact of scan-planes on memory-bandwidth requirement for the class of sliding-window packet switch, which is characterized by parallel memory modules that are physically separate but logically shared among the output ports, and where the control is decentralized. The packets arriving in a given switch cycle can be stored in different memory modules requiring one or more memory cycles. In this paper, we show in a simplified way, that a fixed size common memory space of a sliding window switch can be configured in more than one way using different scan-planes. Furthermore, it is shown that different configurations of the same shared-space impose different memory-bandwidth requirement on the switch, and by increasing the number of scan-planes, the memory-bandwidth requirement of the switch can be decreased. In this paper, we evaluate and present the average-case and worst-case memory-bandwidth requirement for a given sliding-window switch when configured with different scan-planes.

Published in:

HPSR. 2005 Workshop on High Performance Switching and Routing, 2005.

Date of Conference:

12-14 May 2005