By Topic

Delay-fault diagnosis using timing information

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Zhiyuan Wang ; Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA ; M. M. Marek-Sadowska ; K. -H. Tsai ; J. Rajski

In modern technologies, process variations can be quite substantial, often causing design timing failures. It is essential that those errors be correctly and quickly diagnosed. Unfortunately, the resolution of the existing delay-fault diagnostic methodologies is still unsatisfactory. In this paper, the feasibility of using the circuit timing information to guide the delay-fault diagnosis is investigated. A novel and efficient diagnostic approach based on the delay window propagation (DWP) is proposed to achieve significantly better diagnostic results than those of an existing delay-fault diagnostic commercial tool. Besides locating the source of the timing errors, for each identified candidate the proposed method determines the most probable delay defect size. The experimental results indicate that the new method diagnoses timing faults with very good resolution.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:24 ,  Issue: 9 )