By Topic

Comparison of single-walled carbon nanotube transistors fabricated by dielectrophoresis and CVD growth

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Sunkook Kim ; Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA ; Congjun Wang ; Moonsub Shim ; S. Mohammadi

We are comparing two different fabrication technologies for bottom-gate single-walled carbon nanotube field effect transistors. The first technology is based on self-assembly of single-walled nanotube bundles using dielectrophoresis. By applying a combination of DC and AC electric fields, we were able to separate metallic and semiconducting nanotubes and align the semiconducting nanotube bundles between source and drain patterns. Fabricated transistors showed current values in the order of tens of nA and transconductance of 50 nS for devices with one bundle (15 nm width). The second technology is based on synthesis of single-walled carbon nanotubes on top of poly-Si gate using chemical vapor deposition. Transistors fabricated in this technology with only two nanotubes showed current drive in the order of several μA but much higher transconductance of 930 nS. This technology also allowed much lower contact resistances to the nanotubes compared to devices fabricated using dielectrophoresis.

Published in:

5th IEEE Conference on Nanotechnology, 2005.

Date of Conference:

11-15 July 2005