Referenced Items are not available for this document.
In this paper, a Flash memory structure with the floating-gate at the opposite side of conduction channel (refer as OSFG-Flash) is proposed and demonstrated by two-dimensional (2-D) simulation. With the decoupling of the read oxide and tunneling oxide, very thin read oxide can be used to suppress short channel effect while a thick back-tunneling oxide around 10 nm can be used to provide sufficient charge retention time. Excellent scalability of the memory cell is demonstrated through a 2-D simulator down to 50 nm.
Published in:
Electron Devices, IEEE Transactions on
(Volume:52
,
Issue:
9
)
Date of Publication: Sept. 2005
- Page(s):
- 2042 - 2045
- ISSN :
- 0018-9383
- INSPEC Accession Number:
- 8552538
- Digital Object Identifier :
- 10.1109/TED.2005.855061
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 22 August 2005
- Issue Date :
- Sept. 2005
- Sponsored by :
- IEEE Electron Devices Society
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