By Topic

Reducing measurement uncertainty in a DSP-based mixed-signal test environment without increasing test time

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Taillefer, C.S. ; Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada ; Roberts, G.W.

Noise, especially clock jitter effects, in a DSP-based mixed-signal test system severely limits its measurement accuracy. This is especially acute in high-frequency sampling systems. This paper illustrates an efficient method to improve measurement accuracy and precision by reducing the uncertainty of a DSP-based measurement without an increase in test time. A new digitizer architecture is introduced. The digitizer was fabricated in a 0.18-/spl mu/m CMOS process. Experimental results were obtained validating the proposed technique.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:13 ,  Issue: 7 )