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Wafer-level integration technology of surface mount devices using automatic parts alignment technology with vibration

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4 Author(s)
M. Sudou ; Seiko Instruments Inc., Japan ; H. Takao ; K. Sawada ; M. Ishida

This paper presents a new wafer-level integration technology of discrete surface mount devices (SMDs) on silicon-wafers. It is automatic parts alignment on silicon-wafer by means of gravity force and vibration. After silicon IC process, deep holes were formed by deep reactive ion etching (DRIE) process to arrange SMDs. Then a non-conductivity adhesive was spin coated and removed it on the silicon-wafer surface leaving the adhesive at the bottom of the holes. We fixed the silicon-wafer diagonally to a vibration generator and distribute SMDs on it. By vibrating the silicon-wafer, SMDs go down to the lower side occupying the holes automatically. As a result, two different sizes of SMDs were successfully mounted into every hole on silicon wafer. This technology is promising to integrate various discrete devices on integrated devices with batch process-like productivity.

Published in:

The 13th International Conference on Solid-State Sensors, Actuators and Microsystems, 2005. Digest of Technical Papers. TRANSDUCERS '05.  (Volume:2 )

Date of Conference:

5-9 June 2005