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Performance analysis of the sliding-window parallel packet switch

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3 Author(s)
Chia-Lung Liu ; Dept. of Comput. Sci., Nat. Chung-Hsing Univ., Taichung, Taiwan ; Woei Lin ; Chin-Chi Wu

The paper is concerned with performance analysis of the parallel packet switch (PPS) with sliding window (SW) scheme. The PPS is composed of multiple packet switches operating independently and in parallel. The traditional PPS dispatch algorithm uses round-robin (RR) (Iyer, S., IEEE Trans. Networking, vol.11, no.2, p.314-24, 2003; Aslam, A. and Christensen, K., LCN 2002, p.270-7, 2002). The class of PPS is characterized by the deployment of parallel center-stage switches such that all memory buffers run slower than the external line rate. We propose a new SW packet switching scheme for the PPS, called SW-PPS. The SW-PPS can operate in a pipeline fashion to achieve the overall switching operation. Under Bernoulli data traffic, the SW-PPS provides significantly higher performance when compared with RR-PPS. The paper presents a mathematical analytical model for RR-PPS and SW-PPS.

Published in:

Communications, 2005. ICC 2005. 2005 IEEE International Conference on  (Volume:1 )

Date of Conference:

16-20 May 2005