By Topic

A double-precision multiplier with fine-grained clock-gating support for a first-generation CELL processor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

7 Author(s)

The feasibility of a fully integrated RF front-end using an above-IC BAW integration technique is demonstrated for WCDMA applications. The circuit has a voltage gain of 31.3dB, a noise figure of 5.3dB, an in-band IIP3 of -8dBm and IIP2 of 38dBm, with a total power consumption of 36mW. The BAW filter area is 0.45mm2 and the total circuit area including the BAW filter is 2.44mm2.

Published in:

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.

Date of Conference:

10-10 Feb. 2005