A CMOS image sensor with 117 dB DR is demonstrated in a 0.25 μm CMOS technology through merging of multiple exposures. A 12b cyclic ADC with integrated noise canceling is implemented in the column of the image sensor and achieves a DNL of +0.4/-0.8 LSB.
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Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Date of Conference: 10-10 Feb. 2005