Referenced Items are not available for this document.
A 10b pipelined ADC has been realized in a digital 90 nm CMOS technology using techniques such as switched opamps and switched-input buffers. Measurements show that this ADC samples at 12 MS/s achieving a peak SNDR of 52.6 dB using a 1.2 V supply. It consumes 3.3 mW and occupies 0.3 mm2 core area.
Published in:
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Date of Conference: 10-10 Feb. 2005
- Page(s):
- 278 - 279 Vol. 1
- ISSN :
- 0193-6530
- Print ISBN:
- 0-7803-8904-2
- INSPEC Accession Number:
- 8652691
- Conference Location :
- San Francisco, CA
- Digital Object Identifier :
- 10.1109/ISSCC.2005.1493977
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