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Nano-wires for room temperature operated hybrid CMOS-NANO integrated circuits

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9 Author(s)
Ecoffey, S. ; Swiss Fed. Inst. of Technol., Lausanne, Switzerland ; Pott, V. ; Bouvet, D. ; Mazza, M.
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N-doped polysilicon gated-nanowires (poly-SiNW) are reported. The V-shape and hysteresis of their I-V characteristics are used to build analog and memory circuit cells. Integration of the poly-SiNW in CMOS is demonstrated. A precise current-measurement application with 1pA resolution and negative differential resistor is reported. A nanoscale capacitor-less hysteresis memory cell using constant-current biased poly-SiNW is designed and experimentally validated.

Published in:

Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International

Date of Conference:

10-10 Feb. 2005