Referenced Items are not available for this document.
The new generation of multimedia-application processors requires a drastic leakage reduction to bring the standby current to 50μA. An efficient set of leakage reduction techniques, including power gating, memory retention, voltage scaling, and dual Vt, is employed on a 50M transistor, 80mm2 IC, fabricated in a 90nm CMOS technology, resulting in a 40× leakage reduction.
Published in:
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Date of Conference: 10-10 Feb. 2005
- Page(s):
- 138 - 589 Vol. 1
- ISSN :
- 0193-6530
- Print ISBN:
- 0-7803-8904-2
- INSPEC Accession Number:
- 8643493
- Conference Location :
- San Francisco, CA
- Digital Object Identifier :
- 10.1109/ISSCC.2005.1493907
- Product Type:
- Conference Publications
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