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90nm low leakage SoC design techniques for wireless applications

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14 Author(s)
Royannez, P. ; Texas Instrum., Villeneuve Loubet, France ; Mair, H. ; Dahan, F. ; Wagner, M.
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The new generation of multimedia-application processors requires a drastic leakage reduction to bring the standby current to 50μA. An efficient set of leakage reduction techniques, including power gating, memory retention, voltage scaling, and dual Vt, is employed on a 50M transistor, 80mm2 IC, fabricated in a 90nm CMOS technology, resulting in a 40× leakage reduction.

Published in:

Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International

Date of Conference:

10-10 Feb. 2005