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A 126 mm2 4 Gb multilevel AG-AND flash memory with 10 MB/s programming throughput

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15 Author(s)
Kurata, H. ; Hitachi Ltd., Tokyo, Japan ; Sasago, Y. ; Otsuga, K. ; Arigane, T.
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A 4 Gb flash memory, fabricated in 90 nm CMOS technology, results in a 126 mm2 chip size and a 0.0162 μm2/b cell size. Address and temperature compensation methods control the resistance of the inversion-layer local bit-line. A programming throughput of 10 MB/s is achieved by using a self-boosted charge injection scheme.

Published in:

Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International

Date of Conference:

10-10 Feb. 2005

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