A 126 mm/sup 2/ 4 Gb multilevel AG-AND flash memory with 10 MB/s programming throughput

A 4 Gb flash memory, fabricated in 90 nm CMOS technology, results in a 126 mm/sup 2/ chip size and a 0.0162 /spl mu/m/sup 2//b cell size. Address and temperature compensation methods control the resistance of the inversion-layer local bit-line. A programming throughput of 10 MB/s is achieved by using a self-boosted charge injection scheme.