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Damage-Less Sputter Depositions by Plasma Charge Trap for Metal Gate Technologies

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4 Author(s)
Takeuchi, H. ; Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA ; Min She ; Watanabe, K. ; Tsu-Jae King

Damage-free sputter deposition process has been developed for metal gate complementary metal-oxide-semiconductor technology. A plasma charge trap (PCT) was introduced in order to eliminate high-energy particle bombardment during sputter deposition processes. Molybdenum (Mo)-gated PMOSFETs were fabricated using a conventional gate-first process. It is shown that the PCT technology yields excellent characteristics in current drivability, as well as in gate oxide integrity (GOI) such as gate leakage current and charge-to-breakdown$(Q_BD)$. The metal gate was also applied to a nonvolatile memory (NVM), which would require most stringent damage control, and good retention characteristics were demonstrated.

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Semiconductor Manufacturing, IEEE Transactions on  (Volume:18 ,  Issue: 3 )