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On the optimum 2nd harmonic source and load impedances for the efficiency-linearity trade-off of RF LDMOS power amplifiers

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3 Author(s)
Hartskeerl, D.M.H. ; Philips Res. Labs., Eindhoven, Netherlands ; Volokhine, I. ; Spirito, M.

For the first time, a systematic analysis of the simultaneous impact of the second harmonic source and load terminations on the linearity-efficiency trade-off of LDMOS power amplifiers (PAs) is presented. For the combinations studied, it can be concluded that, contrary to common design practice, open-circuiting both the input and output of an RF LDMOS PA at the second harmonic frequency results in the best trade-off. On-wafer large-signal measurements with the above-mentioned optimal impedances have been carried out with single carrier IS-95 CDMA and 3GPP-WCDMA signals at 2.14 GHz. The device used contains a total gate width of 2 mm. For the IS-95 CDMA signal, an output power (Pout) of 223 mW/mm, and a power-added efficiency (PAE) of 35% are obtained at -45 dBc ACPR. This obtained Pout corresponds to only 3.0 dB of back-off. For the 3GPP-WCDMA signal, the -45 dBc ACPR specification at 5 MHz offset is satisfied at 6 dB in back-off with Pout=126 mW/mm, and 33% PAE.

Published in:

Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE

Date of Conference:

12-14 June 2005