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A fully integrated PHS (personal handy phone system) transceiver achieving -105 dBm sensitivity and +21 dBm output power is presented. The transceiver is implemented in a 0.35 μm SiGe BiCMOS process occupying an area of 13 mm2 and dissipating 74 mA in receive mode and 280 mA in transmit from a 3 V supply. The receiver is based on a low-IF architecture and does not require any external filters. The TX integrates a linear +21 dBm power amplifier and achieves 5% EVM and -60 dBc ACP. The transceiver integrates a fractional-N synthesizer with <30 μs lock time and -120 dBc/Hz phase noise at 600 kHz offset frequency. The base-band interface is at 1.2 MHz, compatible with commercially available PHS base-band chips to create a two chip solution for PHS phones.