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Commercial CMOS chips routinely operate at frequencies up to 5 GHz and exciting new opportunities exists in higher frequency bands such as 3-10 GHz, 17 GHz, 24 GHz, and 60 GHz. The Berkeley Wireless Research Center has demonstrated that standard 130 nm CMOS technology is capable of operation up to 60 GHz, enabling a host of new mm-wave applications such as Gb/s WLAN and compact radar imaging. Will circuit design and compact modeling continue along the same course, or is a new microwave design methodology required? This paper highlights the design and modeling challenges in moving up to these higher frequencies. A merger of RF and microwave design perspectives is used to offer insight into the problem. The paper discusses requirements for a next generation compact model to meet these challenges and offers potential solutions.
Date of Conference: 12-14 June 2005