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The psi-cube: a bus-based cube-type network for high-performance on-chip systems

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1 Author(s)
Takesue, M. ; Dept. of Electron. & Inf. Eng., Hosei Univ., Tokyo, Japan

This paper proposes a bus-based cube-type network, called psi-cube, to cope with the two problems, long wires and a limited number of I/O pins, against high-performance on-chip systems. We alleviate the long-wire problem with the small diameter, [n/2], of the 2n-node psi-cube, that is organized on the sets of node-partitions produced based on the n-bit Hamming code (Takesue, 1999) if we connect the nodes in each partition to a single bus. We mitigate the pin-neck problem through dynamic clusters. For each off-chip target such as a memory block, we dynamically produce a set of clusters of the nodes requesting for the target. The traffic to the target reduces in the same way as with the static clusters that are fixed in hardware. We lay out the psi-cube to make the bus length as short as possible and formalize the length; it is O(2p-1) or O(2k-1), where p and k are the sizes of parity and information parts of n-bit addresses. From the results of preliminary evaluation, the psi-cube outperforms over the mesh, assuming a highway bus of which delay is less that 4 times the delay of the mesh link.

Published in:

Parallel Processing, 2005. ICPP 2005 Workshops. International Conference Workshops on

Date of Conference:

14-17 June 2005