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Performance of digital GaAs E/D MESFET circuits fabricated in GaAs-on-Si substrate

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4 Author(s)
Shichijo, H. ; Texas Instruments, Incorporated, Dallas, Texas ; Lee, J.W. ; McLevige, W.V. ; Taddiken, A.

A functional GaAs enhancement/ deplet on (E/D) 1K-bit SRAM and other digital circuits have been fabricated in a GaAs layer grown by MBE on a silicon substrate. These are the most complex digital circuits reported to date for GaAs-on-Si material. The device performance is compared with the bulk GaAs devices fabricated concurrently using identical processes. The average transconductances of enhancement and depletion FETs are found to be approximately 80% of those for bulk GaAs devices. A threshold voltage standard deviation as small as 27 mV across a two inch wafer has been realized. The GaAs-on-Si 1K-bit SRAM has row address access times ranging from 6 to 14 nsec which compares favorably to 4 to 12 nsec for the same SRAMs in bulk GaAs slices.

Published in:

Electron Devices Meeting, 1986 International  (Volume:32 )

Date of Conference:

1986

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