By Topic

A new self-aligned bipolar transistor using vertical nitride mask

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
S. H. Chai ; Electronics & Telecommunications Research Institute, Kyung-Buk, Korea ; J. H. Lee

A new polysilicon self-aligned bipolar n-p-n transistor structure is proposed, and this device is fabricated with 2.0 um design rules, which can be used in very high speed LSI circuits. The extrinsic base contact width of this n-p-n transistor is precisely controllable below 0.3 um, and it permits this device to have very high speed characteristics, which structure is obtained using vertical nitride mask. The mask has been achieved by the anisotropic plasma etching of nitride layer. Through all the process, the emitter of this device is not damaged, therefor a high performance device is obtained. The experimental circuit of CML ring-oscillator has per-gate minimum propagation delay time of 52 ps at 0.16 mW power consumption condition.

Published in:

Electron Devices Meeting, 1985 International  (Volume:31 )

Date of Conference: