A new high-density metallization process for large-scale integrated circuits

This paper describes a new metallization process for large-scale integrated circuits. It employs heat-resistant polyimide layers, which serve two functions: as a liftoff layer for the first level metallization and as an interlevel insulation layer in the two-level interconnection. Two features of this liftoff process distinguish it from the conventional ones. Firstly, a thin SiO
2
mask is used for fine patterning of the polyimide layer by reactive ion etching. Secondly, an auxiliary masking step is introduced in order to increase the flexibility of the liftoff process. Furthermore, the smooth surface of the insulating layer and the heat resistance inherent to the polyimide layer provide an improved two-level interconnection process. Thus the process allows a reproducible patterning of fine metal lines. This liftoff process can be easily integrated into standard fabrication processes.