By Topic

Latch-up and image crosstalk suppression by internal gettering

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Anagnostopoulos, C. ; Eastman Kodak Company, Rochester, NY ; Nelson, E.T. ; Lavine, J.P. ; Wong, K.Y.
more authors

Internal gettering can be used to reduce crosstalk in imagers and latch-up susceptibility in CMOS circuits. The internal gettering process forms defects in the bulk of the silicon wafers that are effective recombination sites for minority carriers in the substrate. Experimental and theoretical results are presented for the crosstalk reduction obtained in an area imager. Also, the current gain β of the parasitic lateral n-p-n transistors formed in the substrate in CMOS circuits was considerably lower for the internally gettered wafers. The trigger current needed to initiate latch-up in the n-p-n-p structures increased as 1/β, in accordance with the theory. A Monte Carlo method was developed to calculate the expected lateral transistor current gain. The calculated β's are in excellent agreement with the measured values.

Published in:

Electron Devices, IEEE Transactions on  (Volume:31 ,  Issue: 2 )