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Design and implementation of a 3D-LSI image sensing processor

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6 Author(s)

A four-story structured image sensing processor implemented with three-dimensional LSI (3D-LSI) technology and integrating 5040 pixel photodiodes and 0.22 million transistors on a 14.3-mm2 single die is described. The implemented chip allows a large degree of data parallelism in image computations where the image sensor unit operates without synchronous clocks. The chip, which is a second prototype, is able to sense 12 characters at the same time, and can recognize 64 different characters in upper and lower case, Arabic numerals, and some symbols, each consisting of a 10×14 matrix. The chip is made of a large number of simple processing elements working in parallel, which speeds up computation. The time needed to identify a sensed image as a memorized character is about 3 μs. Successful measurements of the principal functions verify the usefulness of the chip

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:27 ,  Issue: 8 )

Date of Publication:

Aug 1992

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