By Topic

A process simulation model for multilayer structures involving polycrystalline silicon

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Mei, L. ; Fairchild Camera and Instrument Company, Palo Alto, CA ; Dutton, R.W.

The increasing complexity of VLSI fabrication often requires the use of multilayer structures above the silicon substrate. Electrical and metallurgical properties of multilayer structures have an important effect on circuit performance and reliability. Although process simulation models are available and widely used for computer-aided process design, none of the existing process simulation programs have the capability for modeling multilayer structures. A new model with such capability has been developed and this paper presents the physics as well as the results of simulation supported by experimental data. The model can simulate many desirable properties of multilayer structures involving polycrystalline silicon, such as grain growth, resistivity and oxidation rate of the polysilicon layer, the impurity redistribution across multilayers after high-temperature thermal processing, impurity segregation both at grain boundaries and at interfaces, and the interdependent phenomena of dopant-dependent oxidation/diffusion.

Published in:

Electron Devices, IEEE Transactions on  (Volume:29 ,  Issue: 11 )