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Low-leakage n- and p-channel Silicon-gate FET's with an SiO2-Si3N4-gate insulator

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3 Author(s)
Dockerty, R.C. ; IBM, Systems Products Division, Hopewell Junction, N. Y. ; Abbas, S.A. ; Barile, C.A.

n-channel and p-channel silicon-gate FET's are fabricated using a 300-Å SiO2-300-Å Si3N4gate insulator. These devices have low leakage and are suitable for dynamic FET-memory applications. Very low n-channel leakage is achieved by using an n- or p-doped polycrystalline-silicon field shield. One-device dynamic memory cells exhibit long average retention times: 158 s for the n-channel cell and 34 s for the p-channel cell. An oxygen or steam anneal of the Si3N4is necessary to prevent a large Vtshift during bias-temperature stress.

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Electron Devices, IEEE Transactions on  (Volume:22 ,  Issue: 2 )