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Epitaxial V-groove bipolar integrated circuit process

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2 Author(s)
Rodgers, T.J. ; Stanford University, Stanford, Calif. ; Meindl, J.D.

A new four-mask "V-groove" process for the fabrication of bipolar integrated circuits has been developed. The process utilizes epitaxial ν/n+/n-layers and anisotropic etching of \langle 100\rangle silicon to eliminate the buried layer and isolation diffusions as well as the need for masking the base diffusion of the standard six-mask bipolar integrated circuit process, n-p-n transistor, resistor, and Schottky diode characteristics are equivalent to or exceed those of the standard process. A five-mask V-groove process provides improved lateral p-n-p transistors compared with the four-mask approach. The V-groove integrated circuit structure offers simpler processing, smaller isolation capacitances, lower parasitic collector resistances, larger packing densities, and higher junction breakdown voltages than standard bipolar integrated circuits without degradation of other properties.

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Electron Devices, IEEE Transactions on  (Volume:20 ,  Issue: 3 )